74ALVC08

Features:

· Wide supply voltage range from 1.65 to 3.6 V
· Complies with JEDEC standard:
    JESD8-7 (1.65 to 1.95 V)
    JESD8-5 (2.3 to 2.7 V)
    JESD8B/JESD36 (2.7 to 3.6 V).
· 3.6 V tolerant inputs/outputs
· CMOS low power consumption
· Direct interface with TTL levels (2.7 to 3.6 V)
· Power-down mode
· Latch-up performance exceeds 250 mA
· ESD protection:
    HBM EIA/JESD22-A114-A exceeds 2000 V
    MM EIA/JESD22-A115-A exceeds 200 V.

Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	supply voltage		0.5 to +4.6	V
IIK	input diode current	VI<0	-50	mA
VI	input voltage		0.5 to +4.6	V
IOK	output diode current	VO>VCC or VO<0	±50	mA
VO	output voltage	notes 1 and 2	-50toVcc+0.5	V
		Power-down mode; note 2	0.5 to +4.6
IO	output source or sink current	VO = 0 to VCC	±50	mA
IGND, ICC	VCC or GND current		±100	mA
Tstg	storage temperature		-65to+150
PTOT	power dissipation SO package TSSOP package	above 70 °C derate linearly with 8 mW/K above 60 °C derate linearly with 5.5 mW/K	-500 -500	m/W

Description

The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall times.

The 74ALVC08 provides the 2-input AND function.