Features: • 74ALS573B is broadside pinout version of 74ALS373• 74ALS574A is broadside pinout version of 74ALS374• Inputs and outputs on opposite side of package allow easy interface to microprocessors• Useful as an input or output port for microprocessors• 3-State out...
74ALS573B: Features: • 74ALS573B is broadside pinout version of 74ALS373• 74ALS574A is broadside pinout version of 74ALS374• Inputs and outputs on opposite side of package allow easy interfac...
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Buffers & Line Drivers 16-Bit Buffer/Driver With 3-State Outputs
• 74ALS573B is broadside pinout version of 74ALS373
• 74ALS574A is broadside pinout version of 74ALS374
• Inputs and outputs on opposite side of package allow easy interface to microprocessors
• Useful as an input or output port for microprocessors
• 3-State outputs for bus interfacing
• Common output enable
• 74ALS563A and 74ALS564A are inverting version of 74ALS573B and 74ALS574A respectively
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SYMBOL |
PARAMETER |
RATING |
UNIT |
VCC |
Supply voltage |
0.5 to +7.0 |
V |
VIN |
Input voltage |
0.5 to +7.0 |
V |
IIN |
Input current |
30 to +5 |
mA |
VOUT |
Voltage applied to output in High output state |
0.5 to VCC |
V |
IOUT |
Current applied to output in Low output state |
48 |
mA |
Tamb |
Operating free-air temperature range |
0 to +70 |
°C |
Tstg |
Storage temperature range |
65 to +150 |
°C |
The 74ALS573B is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates.
The 74ALS573B is functionally identical to the 74ALS373 but has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors.
The data of the 74ALS573B on the D inputs is transferred to the latch outputs when the enable (E) input is High. The latch remains transparent to the data input while E is High, and stores the data that is present one setup time before the High-to-Low enable transition.
The 74ALS573B is functionally identical to the 74ALS374 but has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors.It is an 8-bit edge triggered register coupled to eight 3-State output buffers. The two sections of the device are controlled independently
by clock (CP) and output enable (OE) control gates.
The register of the 74ALS573B is fully edge triggered. The state of the D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop's Q output.
The active-Low output of the 74ALS573B enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, latched or transparent data appears at the output.
When OE is High, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.