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74ALS174

Features: • Four edge-triggered D flip-flops• Buffered common clock• Buffered asynchronous master resetPinoutSpecifications SYMBOL PARAMETER RATING UNIT VCC Supply voltage 0.5 to +7.0 V VIN Input voltage 0.5 to +7.0 V IIN Input curren...

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SeekIC No. : 004249279 Detail

74ALS174: Features: • Four edge-triggered D flip-flops• Buffered common clock• Buffered asynchronous master resetPinoutSpecifications SYMBOL PARAMETER RATING UNIT VCC S...

74ALS174 Data Sheet

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Part Number:
74ALS174
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/6/12

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Product Details

Description



Features:

• Four edge-triggered D flip-flops
• Buffered common clock
• Buffered asynchronous master reset



Pinout

Connection Diagram


Specifications

SYMBOL
PARAMETER
RATING
UNIT
VCC
 Supply voltage
0.5 to +7.0
V
VIN
 Input voltage
0.5 to +7.0
V
IIN
 Input current
30 to +5
mA
VOUT
 Voltage applied to output in High output state
0.5 to VCC
V
IOUT
 Current applied to output in Low output state
16
mA
Tamb
 Operating free-air temperature range
0 to +70
Tstg
 Storage temperature range
65 to +150



Description

The 74ALS174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

The register of the 74ALS174 is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop's Q output.

All Q outputs of the 74ALS174 will be forced Low independent of clock or data inputs by a Low voltage level on the MR input. The device is useful for applications where true outputs only are required, and the clock and master reset are common to all storage elements.




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