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74AHCT374

Features: •ESD protection:HBMEIA/JESD22-A114-Aexceeds 2000VMMEIA/JESD22-A115-Aexceeds 200VCDMEIA/JESD22-C101exceeds 1000V•Balanced propagation delays•All inputs have Schmitt-trigger actions•Inputs accepts voltages higher than VCC•Common 3-state output enable inputR...

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SeekIC No. : 004249249 Detail

74AHCT374: Features: •ESD protection:HBMEIA/JESD22-A114-Aexceeds 2000VMMEIA/JESD22-A115-Aexceeds 200VCDMEIA/JESD22-C101exceeds 1000V•Balanced propagation delays•All inputs have Schmitt-trigge...

74AHCT374 Data Sheet

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Part Number:
74AHCT374
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/23

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Product Details

Description



Features:

•ESD protection:
HBMEIA/JESD22-A114-A
exceeds 2000V
MMEIA/JESD22-A115-A
exceeds 200V
CDMEIA/JESD22-C101
exceeds 1000V
•Balanced propagation delays
•All inputs have Schmitt-trigger actions
•Inputs accepts voltages higher than VCC
•Common 3-state output enable input
•ICC category: MSI
•For AHC only:operates with CMOS input levels
•For AHCT only:operates with TTL input levels
•Specified from −40 to +85 and+125°C.


Pinout

Connection Diagram


Description

The 74AHCT374 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No.7A.

The 74AHCT374 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. Aclock (CP) and an output enable (OE</a>) input are common to all flip-flops.

The 8flip-flops of the 74AHCT374 will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition.

When OE</a> is LOW the contents of the 8flip-flops are available at the outputs. When OE</a>is HIGH,the outputs goto the high-impedance OFF-state.Operation of the OE</a> input does not affect the state of the flip-flops.

The'374' is functionally identical to the'534', but has non-inverting outputs.




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