Features: ESD protection: HBMEIA/JESD22-A114-A exceeds 2000V; MMEIA/JESD22-A115-A exceeds 200V CDMEIA/JESD22-C101 exceeds 1000VBalanced propagation delaysInputs accepts voltages higher than VCCFor AHC only:operates with CMOS input levelsFor AHCT only:operates with TTL input levelsSpecified from -4...
74AHCT132: Features: ESD protection: HBMEIA/JESD22-A114-A exceeds 2000V; MMEIA/JESD22-A115-A exceeds 200V CDMEIA/JESD22-C101 exceeds 1000VBalanced propagation delaysInputs accepts voltages higher than VCCFor A...
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Symbol |
Parameter |
CONDITIONS |
Min |
Max |
Unit |
VCC |
DC Power Supplies |
-0.5 |
7.0 |
V | |
VI |
input voltage range |
-0.5 |
7.0 |
V | |
IiK |
DC input diode current |
VI <-0.5V |
- |
-20 |
mA |
IOK |
DC output diode current |
VO <-0.5V or VO>VCC+0.5V; |
- |
±20 |
mA |
IO |
DC output source or sink current |
-0.5V<VO <VCC +0.5V |
- |
±25 |
mA |
ICC |
DC VCC or GND current |
-0.3 |
±75 |
mA | |
Tstg |
Storage Temperature |
-65 |
+150 |
| |
PD |
power dissipation per package |
for temperature range:-40to+125 |
- |
500 |
mW |
The 74AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No.7A. The 74AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter free output signals. The gate switches at different points for positive and negative-going
signals. The difference between the positive voltage VT+ and the negative VT- is defined as the hysteresis voltage VH.