74AHCT125

Features: •ESD protection:HBMEIA/JESD22-A114-Aexceeds 2000VMMEIA/JESD22-A115-Aexceeds 200VCDMEIA/JESD22-C101exceeds 1000V•Balanced propagation delays•All inputs have Schmitt-trigger actions•Inputs accepts voltages higher than VCC•For AHC only:operates with CMOS input ...

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74AHCT125 Picture
SeekIC No. : 004249211 Detail

74AHCT125: Features: •ESD protection:HBMEIA/JESD22-A114-Aexceeds 2000VMMEIA/JESD22-A115-Aexceeds 200VCDMEIA/JESD22-C101exceeds 1000V•Balanced propagation delays•All inputs have Schmitt-trigge...

floor Price/Ceiling Price

Part Number:
74AHCT125
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/22

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Product Details

Description



Features:

•ESD protection:
HBMEIA/JESD22-A114-A
exceeds 2000V
MMEIA/JESD22-A115-A
exceeds 200V
CDMEIA/JESD22-C101
exceeds 1000V
•Balanced propagation delays
•All inputs have Schmitt-trigger actions
•Inputs accepts voltages higher than VCC
•For AHC only:operates with CMOS input levels
•For AHCT only:operates with TTL input levels
•Specified from −40 to +85 and +125°C.



Pinout

  Connection Diagram


Description

The 74AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with
JEDEC standard No.7A.

The 74AHCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (n
OE</a>). A HIGH atn causes the outputs to assume a HIGH-impedance OFF-state.

The '125' is identical to the '126' but has active LOW enable inputs.




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