74AHC32D

The 74AHC32D belongs to 74AHC/AHCT32 family which are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT32 provides the 2-input OR function.

The features of 74AHC32D can be summarized as (1)ESD protection: HBM EIA/JESD22-A114-A, exceeds 2000 V; MM EIA/JESD22-A115-A, exceeds 200 V; CDM EIA/JESD22-C101, exceeds 1000 V; (2)balanced propagation delays; (3)all inputs have schmitt-trigger actions; (4)inputs accepts voltages higher than VCC; (5)for AHC only: operates with CMOS input levels; (6)for AHCT only: operates with TTL input levels; (7)specified from -40 to +85 and +125 °C.

The absolute maximum ratings of 74AHC32D are (1)VCC DC supply voltage: -0.5(MIN)/+7.0(MAX)V; (2)VI input voltage range: -0.5/+7.0 V; (3)IIK DC input diode current(VI < -0.5 V; note 1): -20mA(MAX); (4)IOK DC output diode current( VO <-0.5 V or VO > VCC+ 0.5 V; note 1): ±20mA; (5)IO DC output source or sink current(-0.5 V < VO < VCC + 0.5 V): ±25mA; (6)ICC DC VCC or GND current of the 74AHC32D: ±75mA; (7)Tstg storage temperature range: -65 to +150°C; (8)PD power dissipation per package(for temperature range: -40 to +125 °C; note 2): 500mW(NOTE 1. The input and output voltage ratings of the 74AHC32D may be exceeded if the input and output current ratings are observed. 2. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K. For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.).