74AHC2G241

Features:

Symmetrical output impedance
High noise immunity
ESD protection:
  HBM EIA/JESD22-A114-A exceeds 2000 V
  MM EIA/JESD22-A115-A exceeds 200 V
  CDM EIA/JESD22-C101 exceeds 1000 V.
Low power dissipation
Balanced propagation delays
SOT505-2 and SOT765-1 package
Specified from -40 °C to +85 °C and from -40 °C to +125 °C.


Pinout




Specifications

Symbol	Parameter	Conditions	Min	Max	Unit
VCC	supply voltage		-0.5	+7.0	V
VI	input voltage		-0.5	+7.0	V
IIK	input diode current	VI< -0.5 V	-	-20	mA
IOK	output diode current	VO> -0.5V or VO> VCC +0.5 V[1]	-	±20	mA
IO	output source or sink current	VO = -0.5 V to (VCC + 0.5 V)	-	±25	mA
ICC, IGND	VCC or GND current		-	±75	mA
Tstg	storage temperature		-65	+150	°C
Ptot	power dissipation	Tamb = -40 °C to +125 °C	-	250	mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.


Description

The 74AHC2G241 is a high-speed Si-gate CMOS device.

The 74AHC2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times.