Features: ` Symmetrical output impedance
` High noise immunity
` ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V.
` Low power dissipation
` Balanced propagation delays
` Very small 5-pin package
` Output capability: standard
` Specified from -40 to +125 °C.Pinout
Specifications
|
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
UNIT |
|
VCC |
supply voltage |
|
-0.5 |
+7.0 |
V |
|
VI |
input voltage |
|
-0.5 |
+7.0 |
V |
|
LIK |
input diode current |
VI < -0.5 V; note 1 |
- |
-20 |
mA |
|
IOK |
output diode current |
VO < -0.5 V or VO > VCC + 0.5 V; note 1 |
- |
±20 |
mA |
|
IO |
output source or sink current |
-0.5 V < VO < VCC + 0.5 V |
- |
±25 |
mA |
|
ICC |
DVCC or GND current |
|
- |
±75 |
mA |
|
Tstg |
storage temperature |
|
-65 |
±150 |
|
|
PD |
power dissipation per package |
for temperature range from -40 to +125 °C; |
- |
250 |
m/W |
DescriptionThe 74AHC1G126 is a high-speed Si-gate CMOS device.The 74AHC1G/AHCT1G126 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input pin (OE). A LOW at pin OE causes the output to assume a high-impedance OFF-state.
The unique features of the 74AHC1G126: The first one is low power dissipation.The second one is balanced propagation delays. The third one is very small 5-pin package.The forth one is output capability: standard.The forth one is specified from -40 to +125 °C.There are also some limiting values.Supply voltage(VCC) is -0.5 V min, 1 V typ and +7.0 V max.Input voltage(VI) is -0.5 V min and +7.0 V max.Input diode current(IIK,VI < -0.5 V) is -20 mA max.output diode current(IOK,VO < -0.5 V or VO > VCC + 0.5 V) is ±20 mA max.output source or sink current(IO,-0.5 V < VO < VCC + 0.5 V) is ±25 mA max.VCC or GND current(ICC) is ±75 mA max.storage temperature(Tstg) is -65°C min and +150 °C max.power dissipation per package for temperature range from -40 to +125 °C(PD) is - 250 mW max.
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The 74AHC1G/AHCT1G126 is a high-speed Si-gate CMOS device.
The 74AHC1G/AHCT1G126 provides one non-inverting buffer/line driver with 3-state output. The 3-state output iscontrolled by the output enable input pin (OE). A LOW at pin OE causes the output to assume a high-impedance OFF-state.
74AHC1G126 Data Sheet
