74AHC157

The 74AHC157 are high-speed Si-gate CMOS  devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.

The 74AHC157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (S). The enable input (E) is active LOW. When E is HIGH, all of the outputs (1Y to 4Y) are forced LOW regardless of all other input conditions.

Moving the data of the 74AHC157 from two groups of registers to four common output buses is a common use of the '157'. The state of the common data select input (S) determines the particular register from which the data comes. It can also be used as a function generator.

The 74AHC157 is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common.

The 74AHC157 is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determine by the logic levels applied to S.
The logic equations are:
1Y = E ´ (1I₁ * S + 1I₀ *S);
2Y = E ´ (2I₁ * S + 2I₀ *S);
3Y = E ´ (3I₁ * S + 3I₀ * S);
4Y = E ´ (4I₁ * S + 4I₀ * S).
The '157' is identical to the '158' but has non-inverting (true) outputs.