74ACTQ74

Features: ICC reduced by 50%Guaranteed simultaneous switching noise level and dynamic threshold performanceGuaranteed pin-to-pin skew AC performanceImproved latch-up immunity4 kV minimum ESD immunityTTL-compatible inputsPinoutSpecificationsSupply Voltage (VCC)-0.5V to +7.0VDC Input Diode Current (...

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SeekIC No. : 004249134 Detail

74ACTQ74: Features: ICC reduced by 50%Guaranteed simultaneous switching noise level and dynamic threshold performanceGuaranteed pin-to-pin skew AC performanceImproved latch-up immunity4 kV minimum ESD immunit...

floor Price/Ceiling Price

Part Number:
74ACTQ74
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

 ICC reduced by 50%
 Guaranteed simultaneous switching noise level and dynamic threshold performance
 Guaranteed pin-to-pin skew AC performance
 Improved latch-up immunity
 4 kV minimum ESD immunity
 TTL-compatible inputs



Pinout

  Connection Diagram


Specifications

Supply Voltage (VCC)                              -0.5V to +7.0V
DC Input Diode Current (IIK)
     VI = -0.5V                                                      -20 mA
     VI = VCC + 0.5V                                             +20 mA
DC Input Voltage (VI)                      -0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
     VO = -0.5V                                                     -20 mA
     VO = VCC + 0.5V                                            +20 mA
DC Output Voltage (VO)                   -0.5V to VCC + 0.5V
DC Output Source
     or Sink Current (IO)                                      ± 50 mA
DC VCC or Ground Current
     per Output Pin (ICC or IGND)                         ± 50 mA
Storage Temperature (TSTG)               -65°C to +150°C
DC Latch-Up Source or Sink Current                ± 300 mA
Junction Temperature (TJ) PDIP                            140°C
  


Description

The 74ACTQ74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage of the 74ACTQ74 has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.

The 74ACTQ74 utilizes Fairchild Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet SeriesTMfeatures GTOTMoutput control and undershoot corrector in addition to a split ground bus for superior performance.




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