74ACTQ646

Features: ·Guaranteed simultaneous switching noise level and dynamic threshold performance·Guaranteed pin-to-pin skew AC performance·Independent registers for A and B busses·Multiplexed real-time and stored data transfers·300 mil slim dual-in-line package·Outputs source/sink 24 mA·Faster prop dela...

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74ACTQ646 Picture
SeekIC No. : 004249130 Detail

74ACTQ646: Features: ·Guaranteed simultaneous switching noise level and dynamic threshold performance·Guaranteed pin-to-pin skew AC performance·Independent registers for A and B busses·Multiplexed real-time an...

floor Price/Ceiling Price

Part Number:
74ACTQ646
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/24

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Product Details

Description



Features:

·Guaranteed simultaneous switching noise level and dynamic threshold performance
·Guaranteed pin-to-pin skew AC performance
·Independent registers for A and B busses
·Multiplexed real-time and stored data transfers
·300 mil slim dual-in-line package
·Outputs source/sink 24 mA
·Faster prop delays than the standard AC/ACT646



Pinout

  Connection Diagram


Specifications

 

Supply Voltage (VCC) ........−0.5V to +7.0V
DC Input Diode Current (IIK)
VI = −0.5V ...................−20 mA
VI = VCC + 0.5V ................+20 mA
DC Input Voltage (VI) ......−0.5V to VCC0.5V
DC Output Diode Current (IOK)
VO = −0.5V .................. −20 mA
VO = VCC + 0.5V ...............+20 mA
DC Output Voltage (VO) ..  −0.5V to VCC + 0.5V
DC Output Source
or Sink Current (IO)..............±50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND)........ ±50 mA
Storage Temperature (TSTG).. −65°C to +150°C
DC Latch-Up Source
or Sink Current ................±300 mA
Junction Temperature (TJ)PDIP ........140°C




Description

The 74ACTQ646 consist of registered bus transceiver circuits, with outputs, D-type flip-flops, and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental handling functions available are illustrated in Figure 1, Figure 2, Figure 3 and Figure 4.

The 74ACTQ646 utilizes Fairchild Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance.




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