Features: ICC reduced by 50%Output source/sink 24 mAACT74 has TTL-compatible inputsApplicationLOW input to SD(Set) sets Q to HIGH levelLOW input to CD(Clear) sets Q to LOW levelClear and Set are independent of clockSimultaneous LOW on CDand SD makes both Q and QHIGHPinoutSpecificationsSupply Volta...
74ACT74: Features: ICC reduced by 50%Output source/sink 24 mAACT74 has TTL-compatible inputsApplicationLOW input to SD(Set) sets Q to HIGH levelLOW input to CD(Clear) sets Q to LOW levelClear and Set are ind...
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ICC reduced by 50%
Output source/sink 24 mA
ACT74 has TTL-compatible inputs
Supply Voltage (VCC ) -0.5V to+7.0V
DC Input Diode Current (IIK)
VI = -0.5V -20 mA
VI = VCC +0.5V +20 mA
DC Input Voltage (VI) -0.5V to VCC +0.5V
DC Output Diode Current (IOK)
VI = -0.5V -20 mA
VI = VCC +0.5V +20 mA
DC Output Voltage (VO) -0.5V to VCC +0.5V
DC Output Source
or Sink Current (IO) ±50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND) ±50 mA
Storage Temperature (TSTG ) -65 to +150
Junction Temperature (TJ)
PDIP 140
The 74ACT74 is a dual D-type flip-flop with Asynchronou Clear and Set inputs and complementary (Q, Q) outputs Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. After the Clock Pulse input threshold voltage of the 74ACT74 has been passed, the Data input is locked out and information present will not be transferred to the outputs until the next rising edge of the Clock Pulse input.