74ACT646SPC

Number of Channels per Chip : 8
Output Type : 3-State
Logic Type : CMOS
Supply Voltage - Max : 5.5 V
Maximum Operating Temperature : + 85 C
High Level Output Current : - 24 mA
Low Level Output Current : 24 mA
Supply Voltage - Min : 4.5 V
Output Level : CMOS
Input Level : TTL
Package / Case : PDIP-24
Logic Family : ACT
Propagation Delay Time : 14.5 ns
Packaging : Rail


Features:

Independent registers for A and B buses
Multiplexed real-time and stored data transfers
3-STATE outputs
300 mil dual-in-line package
Outputs source/sink 24 mA
ACT646 has TTL compatible inputs


Pinout




Specifications

Supply Voltage (V_CC).................. −0.5V to +7.0V
DC Input Diode Current (I_IK)
    V_I = −0.5V ......................................... −20 mA
    V_I = VCC + 0.5V................................. +20 mA
DC Input Voltage (V_I) .........−0.5V to V_CC + 0.5V
DC Output Diode Current (I_OK)
    V_O = −0.5V........................................  −20 mA
    V_O = V_CC + 0.5V +20 mA
DC Output Voltage (V_O) ......−0.5V to V_CC + 0.5V
DC Output Source
    or Sink Current (I_O)............................ ±50 mA
DC V_CC or Ground Current
    per Output Pin (I_CC or I_GND)............... ±50 mA
Storage Temperature (T_STG)... −65°C to +150°C
Junction Temperature (T_J)
    PDIP ......................................................140°C


Description

The 74ACT646SPC consist of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental data of the 74ACT646SPC handling functions available are illustrated in Figures 1, 2, 3, and Figure 4.