74ACT646

Features: Independent registers for A and B busesMultiplexed real-time and stored data transfers3-STATE outputs300 mil dual-in-line packageOutputs source/sink 24 mAACT646 has TTL compatible inputsPinoutSpecificationsSupply Voltage (VCC).................. −0.5V to +7.0VDC Input Diode Current ...

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74ACT646 Picture
SeekIC No. : 004249079 Detail

74ACT646: Features: Independent registers for A and B busesMultiplexed real-time and stored data transfers3-STATE outputs300 mil dual-in-line packageOutputs source/sink 24 mAACT646 has TTL compatible inputsPi...

floor Price/Ceiling Price

Part Number:
74ACT646
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/8/14

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Product Details

Description



Features:

Independent registers for A and B buses
Multiplexed real-time and stored data transfers
3-STATE outputs
300 mil dual-in-line package
Outputs source/sink 24 mA
ACT646 has TTL compatible inputs



Pinout

  Connection Diagram


Specifications

Supply Voltage (VCC).................. −0.5V to +7.0V
DC Input Diode Current (IIK)
    VI = −0.5V ......................................... −20 mA
    VI = VCC + 0.5V................................. +20 mA
DC Input Voltage (VI) .........−0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
    VO = −0.5V........................................  −20 mA
    VO = VCC + 0.5V +20 mA
DC Output Voltage (VO) ......−0.5V to VCC + 0.5V
DC Output Source
    or Sink Current (IO)............................ ±50 mA
DC VCC or Ground Current
    per Output Pin (ICC or IGND)............... ±50 mA
Storage Temperature (TSTG)... −65°C to +150°C

Junction Temperature (TJ)
    PDIP ......................................................140°C
  


Description

The 74ACT646 consist of registered bus transceiver circuits, with outputs, D-type flip-flops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data of the 74ACT646 on the A or B bus will be loaded into the respective registers on the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental data handling functions available are illustrated in Figures 1, 2, 3, and Figure 4.




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