74ACT11373

PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 VInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 VOutput voltage range, V...

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74ACT11373 Picture
SeekIC No. : 004248981 Detail

74ACT11373: PinoutSpecificationsSupply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 VInput voltage range, VI (see Note 1) . . . ....

floor Price/Ceiling Price

Part Number:
74ACT11373
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/21

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Product Details

Description



Pinout

  Connection Diagram


Specifications

Supply voltage range, VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 6 V
Input voltage range, VI (see Note 1)   . . . . . . . . . . . . . . . . . . . . .   . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1)     . . . . . . . . . . . . . . . . .   . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) .   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC)     . . . . . . . . . . . . . .  . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC)   . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . ±50 mA
Continuous current through VCC or GND   . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . ±200 mA
Maximum power dissipation at TA = 55(in still air) (see Note 2): DB package   . . . . . . . . . . . . . 0.65 W
                                                                                                       DW package . .  . . . . . . . . . . . . 1.7 W
                                                                                                       NT package  . . . . . . .  . . . . . . . 1.3 W
Storage temperature range, Tstg   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .   . . . . . . .  . . 65 to 150



Description

This 8-bit latch features 3-state outputs of the 74ACT11373 designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the 74ACT11373 are transparent D-type latches. While the latch-enable (LE) input is high,the Q outputs follow the data (D) inputs. When the enable is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impendance third state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pullup components.

OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

The 74ACT11373 is characterized for operation from 40to 85.




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