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74AC11240

Features: Flow-Through Architecture Optimizes PCB LayoutCenter-Pin VCC and GND Configurations Minimize High-Speed Switching NoiseEPICTM (Enhanced-Performance Implanted CMOS) 1-m Process500-mA Typical Latch-Up Immunity at 125°CPackage Options Include Plastic Small-Outline (DW) and Shrink Small-Outl...

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SeekIC No. : 004248853 Detail

74AC11240: Features: Flow-Through Architecture Optimizes PCB LayoutCenter-Pin VCC and GND Configurations Minimize High-Speed Switching NoiseEPICTM (Enhanced-Performance Implanted CMOS) 1-m Process500-mA Typica...

74AC11240 Data Sheet

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Part Number:
74AC11240
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

 Flow-Through Architecture Optimizes PCB Layout
 Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
 EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
 500-mA Typical Latch-Up Immunity at 125°C
 Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (NT)


Pinout

Connection Diagram


Specifications

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 4.6V
Input voltage range, VI (see Note 1) . . . . . . . . . . . .. . . .  . . . . .. . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Notes 1 ) . . . . . . . . . . . . . . .  . . . . . . . . . .  . . .0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . .±50 mA
Continuous current through VCC or GND  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ... ±100mA
Maximum power package dissipation at TA = 55°C (in still air)(see Note 2):DB package  . .  . 0.65 W
                                                                                                                     DW package  . . . . 1.7 W
                                                                                                                     NT package  . . . . .1.3 W 
Storage temperature range ,Tstg . . .  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  .  . . 65°C to 150°C  


Description

This octal buffer/line driver of the 74AC11240 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device provides inverting outputs and symmetrical active-low output-enable (OE) inputs. This device features high fan-out and improved fan-in.

The 74AC11240 is organized as two 4-bit buffers/line drivers with separate OE inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.

The 74AC11240 is characterized for operation from 40°C to 85°C.




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