74AC109PC

Number of Circuits : 2
Input Type : Single-Ended
Maximum Operating Temperature : + 85 C
High Level Output Current : - 24 mA
Low Level Output Current : 24 mA
Mounting Style : Through Hole
Packaging : Tube
Polarity : Inverting/Non-Inverting
Output Type : Differential
Supply Voltage - Max : 6 V
Logic Family : 74AC
Package / Case : PDIP-16
Propagation Delay Time : 14 ns
Logic Type : J-K Positive Edge Triggered Flip-Flop


Features:

I_CC reduced by 50%
Outputs source/sink 24 mA
ACT109 has TTL-compatible inputs


Pinout




Specifications

Supply Voltage (V_CC).................. −0.5V to +7.0V
DC Input Diode Current (I_IK)
    V_I = −0.5V ......................................... −20 mA
    V_I = VCC + 0.5V................................. +20 mA
DC Input Voltage (V_I) .........−0.5V to V_CC + 0.5V
DC Output Diode Current (I_OK)
    V_O = −0.5V........................................  −20 mA
    V_O = V_CC + 0.5V +20 mA
DC Output Voltage (V_O) ......−0.5V to V_CC + 0.5V
DC Output Source
    or Sink Current (I_O)............................ ±50 mA
DC V_CC or Ground Current
    per Output Pin (I_CC or I_GND)............... ±50 mA
Storage Temperature (T_STG)... −65°C to +150°C
Junction Temperature (T_J)
    PDIP ......................................................140°C


Description

The 74AC109PC consists of two high-speed completely independent transition clocked JK flip-flops. The clocking operation is independent of rise and fall times of the clock waveform. The JK design allows operation as a D-Type flip-flop (refer to AC/ACT74 data sheet) by connecting the J and K inputs together. Asynchronous Inputs:

LOW input to S_D (Set) sets Q to HIGH level

LOW input to C_D (Clear) sets Q to LOW level

Clear and Set are independent of clock

Simultaneous LOW on C_D and S_D makes both Q and Q HIGH