74AC109

Features: · ICC reduced by 50%· Outputs source/sink 24 mA·ACT109 has TTL-compatible inputsPinoutSpecificationsSupply Voltage (VCC). . . . . .. . . . . .. . .−0.5V to +7.0VDC Input Diode Current (IIK) VI = −0.5V. . . . . .. . . . . .. . . . . .. . . . . . . . −20 mA VI = VCC + 0.5...

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74AC109 Picture
SeekIC No. : 004248819 Detail

74AC109: Features: · ICC reduced by 50%· Outputs source/sink 24 mA·ACT109 has TTL-compatible inputsPinoutSpecificationsSupply Voltage (VCC). . . . . .. . . . . .. . .−0.5V to +7.0VDC Input Diode Curren...

floor Price/Ceiling Price

Part Number:
74AC109
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

· ICC reduced by 50%
· Outputs source/sink 24 mA
·ACT109 has TTL-compatible inputs



Pinout

  Connection Diagram


Specifications

Supply Voltage (VCC)  . . . . . . . . . . . . . . .−0.5V to +7.0V
DC Input Diode Current (IIK)
    VI = −0.5V  . . . . . . . . . . . . . . . . . . . . . . . .  . .  −20 mA
    VI = VCC + 0.5V  . . . . . . . . . . . . . . . . . . . . . ..  +20 mA
DC Input Voltage (VI)  . . . . . . . . . . .−0.5V to VCC + 0.5V
DC Output Diode Current (IOK)
    VO = −0.5V . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
    VO = VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .   +20 mA
DC Output Voltage (VO)  . . . . . . . .  −0.5V to VCC + 0.5V
DC Output Source
or Sink Current (IO) . . . . . . . . . . . . . . . . . . . . .  ± 50 mA
DC VCC or Ground Current
per Output Pin (ICC or IGND)  . . . . . . . . . . . . . .± 50 mA
Storage Temperature (TSTG)  . . . . . .−65°C to +150°C
Junction Temperature (TJ)
    PDIP  . . . . .  . . . . . . . . . . . . . . . . . . . . . . . . . . .140°C



Description

The 74AC109 consists of two high-speed completely independent transition clocked JK flip-flops. The clocking
operation is independent of rise and fall times of the clock waveform. TheJK design allows operation as a D-Type
flip-flop (refer to 74AC109 data sheet) by connecting the J and K inputs together.

Asynchronous Inputs:
LOW input to SD (Set) sets Q to HIGH level
LOW input to CD (Clear) sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes
both Q and Q HIGH


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