74ABTH16952

Features: • Two 8-bit registered transceivers• Live insertion/extraction permitted• Power-up 3-State• 74ABTH16952 incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs• Power-up reset• Multiple VCC and GN...

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SeekIC No. : 004248813 Detail

74ABTH16952: Features: • Two 8-bit registered transceivers• Live insertion/extraction permitted• Power-up 3-State• 74ABTH16952 incorporates bus-hold data inputs which eliminate the need f...

floor Price/Ceiling Price

Part Number:
74ABTH16952
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

• Two 8-bit registered transceivers
• Live insertion/extraction permitted
• Power-up 3-State
• 74ABTH16952 incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs
• Power-up reset
• Multiple VCC and GND pins minimize switching noise
• Independent registers for A and B buses
• Output capability: +64mA/32mA
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs



Pinout

  Connection Diagram  Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage   0.5 to +7.0 V
IIK DC input diode current VI < 0
18 mA
VI DC input voltage3   1.2 to +7.0 V
IOK DC output diode current VO < 0 50 mA
VOUT DC output voltage3 output in Off or High state 0.5 to +5.5 V
IOUT DC output current output in Low state 128 mA
Output in High state -64  mA
Tstg Storage temperature range   65 to 150 °C



Description

   The 74ABTH16952 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

   The 74ABTH16952 is a dual octal registered transceiver. Two 8-bit registers store data flowing in both directions between two bidirectional buses. Data applied to the inputs is entered and stored on the rising edge of the Clock (nCPXX) provided that the Clock Enable (nCEXX ) is Low. The data is then present at the 3-State output buffers, but is only accessible when the Output Enable (nOEXX ) is Low. Data flow from A inputs to B outputs is the same as for B inputs to A outputs.

  Two options are available, 74ABT16952 which does not have the bus-hold feature and 74ABTH16952 which incorporates the bus-hold feature.


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