Features: Independent registers for A and B buses
Multiple VCC and GND pins minimize switching noise
Live insertion/extraction permitted
Powerup 3-State
Powerup reset
Multiplexed real-time and stored data
Outputs sink 64mA and source 32mA
Latchup protection exceeds 500mA per JEDEC Std 17
74ABTH16646 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine ModelPinout
Specifications
| SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
| VCC |
DC supply voltage |
|
0.5 to +7.0 |
V |
| IIK |
DC input diode current |
VI < 0
|
18 |
mA |
| VI |
DC input voltage3 |
|
1.2 to +7.0 |
V |
| IOK |
DC output diode current |
VO < 0
|
50 |
mA |
| VOUT |
DC output voltage3 |
output in Off or High state |
0.5 to +5.5 |
V |
| IOUT |
DC output current |
output in Low state |
128 |
mA |
| output in High state |
64 |
mA |
| Tstg |
Storage temperature range |
|
65 to 150 |
|
DescriptionThe 74ABTH16646 highperformance BiCMOS device combines low Bstatic and dynamic power dissipation with high speed and high output drive.
The 74ABTH16646 16-bit transceiver/register consists of two sets of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (nOE) and Direction (nDIR) pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both.
The select (nSAB, nSBA) pins of the 74ABTH16646 determine whether data is stored or transferred through the device in real-time. The nDIR determines which bus will receive data when the nOE is active Low. In the isolation mode (nOE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time.
Two options are available, 74ABT16646 which does not have the bus-hold feature and 74ABTH16646 which incorporates the bus-hold feature.
74ABTH16646 Data Sheet
