74ABTH16501A

Features:

• 18-bit bidirectional bus interface
• 3-State buffers
• Output capability: +64mA/-32mA
• TTL input and output switching levels
• 74ABTH16501A incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unusedinputs
• Live insertion/extraction permitted
• Power-up reset
• Power-up 3-State
• Positive edge-triggered clock inputs
• Latch-up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
• Flexible operation permits 18 embedded D-type latches or flip-flops to operate in clocked, transparent, and latched modes.


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		0.5 to +7.0	V
IIK	DC input diode current	VI < 0	18	mA
VI	DC input voltage3		1.2 to +7.0	V
IOK	DC output diode current	VO < 0	50	mA
VOUT	DC output voltage3	Output in Off or High state	0.5 to +5.5	V
IO IOUT	DC output voltage3	Output in Low state Output in High state	128 64	ma
Tstg	Storage temperature range	65 to +150	65 to +150	°C

Description

The 74ABTH16501A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
This device is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is High. When LEAB is Low, the A data is latched if CPAB is held at a High or Low logic level. If LEAB is Low, the A-bus data is stored in the latch/flip-flop on the Low-to-High transition of CPAB. When OEAB is High, the outputs are active. When OEAB is Low, the outputs are in the high-impedance state. Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA. The output enables are complimentary (OEAB is active High, and OEBA is active Low). Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level. Two options are available, 74ABTH16501A which does not have thebus-hold feature and 74ABTH16501A which incorporates the bus-hold feature.