74ABTH161543

Features:

• Two 8-bit octal transceivers with D-type latch
• Live insertion/extraction permitted
• Power-up 3-State
• Power-up reset
• Multiple VCC and GND pins minimize switching noise
• Back-to-back registers for storage
• Separate controls for data flow in each direction
• 74ABTH161543 incorporates Bus hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs
• Output capability: +64mA/32mA
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model
• Same function as ABT16543 except for additional Master Reset control pins


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		0.5 to 7.0	V
IIK	DC input diode current	VI < 0	18	mA
VI	DC input voltage3		1.2 to +7.0	v
IOK	DC output diode current	VO < 0	50	mA
VOUT	DC output voltage3	Output in Off or High state	0.5 to +5.5	v
IOUT	DC output current	Output in Low state	128	mA
		Output in High state	64
Tstg	Storage temperature range		65 to +150	°C

Description

The 74ABTH161543 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT161543 16-bit registered transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate Latch Enable (nLEAB, nLEBA) and Output Enable (nOEAB, nOEBA) inputs are provided for each register to permit independent control of data transfer in either direction. Master reset (MR) clears all registers simultaneously and sets them Low.The outputs of the 74ABTH161543 are guaranteed to sink 64mA.