74ABT843N

The 74ABT843N is one member of the 74ABT843 family which is designed as the 9-bit bus interface latch with set and reset (3-State) that consists of nine D-type latches with 3-State outputs. In addition to the LE and OE pins, it has a Master Reset (MR) pin and Preset (PRE) pin. These pins are ideal for parity bus interfacing in high performance systems.

Features of the 74ABT843N are:(1)High speed parallel latches; (2)Extra data width for wide address/data paths or buses carrying parity; (3)Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors; (4)Slim DIP 300 mil package; (5)Broadside pinout; (6)Output capability: +64mA/?2mA; (7)Latch-up protection exceeds 500mA per Jedec Std 17; (8)ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model; (9)Power-up 3-State; (10)Power-up reset.

The absolute maximum ratings of the 74ABT843N can be summarized as:(1)DC supply voltage:0.5 to +7.0 V;(2)DC input diode current:18 mA;(3)DC input voltage:1.2 to +7.0 V;(4)DC output diode current:50 mA;(5)DC output voltage:0.5 to +5.5 V;(6)DC output current:128 mA;(7)Storage temperature range:65 to 150 °C. If you want to know more information such as the electrical characteristics about the 74ABT843N, please download the datasheet in www.seekic.com or www.chinaicmart.com.