DescriptionThe 74ABT823N belongs to 74ABT823 family which is a 9-bit wide buffered register with Clock Enable (CE) and Master Reset (MR) which are ideal for parity bus interfacing in high microprogrammed systems. The register is fully edge-triggered. The state of each D input, one set-up time befo...
74ABT823N: DescriptionThe 74ABT823N belongs to 74ABT823 family which is a 9-bit wide buffered register with Clock Enable (CE) and Master Reset (MR) which are ideal for parity bus interfacing in high microprogr...
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The 74ABT823N belongs to 74ABT823 family which is a 9-bit wide buffered register with Clock Enable (CE) and Master Reset (MR) which are ideal for parity bus interfacing in high microprogrammed systems. The register is fully edge-triggered. The state of each D input, one set-up time before the Low-to-High clock transition is transferred to the corresponding flip-flop's Q output. The 74ABT823 Bus interface Register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity.
The features of 74ABT823N can be summarized as (1)high speed parallel registers with positive edge-triggered D-type flip-flops; (2)ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors; (3)output capability: +64mA/±32mA; (4)latch-up protection exceeds 500mA per Jedec Std 17; (5)ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per machine model; (6)power-up 3-state; (7)power-up reset.
The absolute maximum ratings of 74ABT823N are (1)VCC DC supply voltage: -0.5 to +7.0V; (2)VI input voltage range: -1.2 to +7.0V; (3)IIK DC input diode current(VI < 0): -18mA; (4)IOK DC output diode current(VO <0): -50mA; (5)IOUT DC output current(output in Low state): 128mA; (6)VOUT DC output voltage (output in off or high state): -0.5 to +5.5V; (7)Tstg storage temperature range: -65 to +150°C.(1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3.The input and output voltage ratings of the 74ABT823N may be exceeded if the input and output current ratings are observed.)