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74ABT823

Features: • High speed parallel registers with positive edge-triggered D-type flip-flops• Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors• Output capability: +64mA/32mA• Latch-up protection exceeds 500mA per Jedec Std 17̶...

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SeekIC No. : 004248765 Detail

74ABT823: Features: • High speed parallel registers with positive edge-triggered D-type flip-flops• Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors...

74ABT823 Data Sheet

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Part Number:
74ABT823
Supply Ability:
5000

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  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• High speed parallel registers with positive edge-triggered D-type flip-flops
• Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
• Output capability: +64mA/32mA
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
• Power-up 3-State
• Power-up Reset


Pinout

Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DC supply voltage   0.5 to 7.0 V
IIK DC input diode current VI < 0 18 mA
VI DC input voltage3     1.2 to 7.0 V
IOK DC output diode current VO < 0 50 mA
VOUT DC output voltage3 output in Off or High state 0.5 to 5.5 V
IOUT DC output current output in Low state 128 mA
Tstg Storage temperature range   65 to 150

NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.


Description

The 74ABT823 Bus interface Register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity.

The 74ABT823 is a 9-bit wide buffered register with Clock Enable (CE) and Master Reset (MR) which are ideal for parity bus interfacing in high microprogrammed systems. The register is fully edge-triggered.

The state of each D input, one set-up time before the Low-to-High clock transition is transferred to the corresponding flip-flop's Q output.




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