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74ABT652

Features: · Independent registers for A and B buses· Multiplexed real-time and stored data· A and B output sink capability of 64 mA, source capability of 32 mA· Guaranteed output skew· Guaranteed multiple output switching specifications· Output switching specified for both 50 pF and 250 pF loads· ...

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SeekIC No. : 004248759 Detail

74ABT652: Features: · Independent registers for A and B buses· Multiplexed real-time and stored data· A and B output sink capability of 64 mA, source capability of 32 mA· Guaranteed output skew· Guaranteed mu...

74ABT652 Data Sheet

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Part Number:
74ABT652
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/5/18

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Product Details

Description



Features:

· Independent registers for A and B buses
· Multiplexed real-time and stored data
· A and B output sink capability of 64 mA, source capability of 32 mA
· Guaranteed output skew
· Guaranteed multiple output switching specifications
· Output switching specified for both 50 pF and 250 pF loads
· Guaranteed simultaneous switching noise level and dynamic threshold performance
· Guaranteed latchup protection
· High impedance glitch free bus loading during entire power up and power down cycle
· Nondestructive hot insertion capability


Pinout

Connection Diagram


Specifications

Storage Temperature ......... -65°C to +150°C
Ambient Temperature under Bias ..-55°C to +125°C
Junction Temperature under Bias ..-55°C to +150°C
VCC Pin Potential to Ground Pin .... -0.5V to +7.0V
Input Voltage (Note 3) .........   -0.5V to +7.0V
Input Current (Note 3) ....... -30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disable
or Power-Off State ............ -0.5V to +5.5V
in the HIGH State .............. -0.5V to VCC
Current Applied to Output
in LOW State (Max) twice the rated IOL .....  (mA)
DC Latchup Source Current........... -500 mA
Over Voltage Latchup (I/O) ..............10V


Description

The 74ABT652 consists of bus transceiver circuits with Dtype flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins of the 74ABT652 (OEAB, OEBA) are provided to control the transceiver function.




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