DescriptionThe 74ABT648N belongs to 74ABT648 family, and the transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data ...
74ABT648N: DescriptionThe 74ABT648N belongs to 74ABT648 family, and the transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arrang...
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The 74ABT648N belongs to 74ABT648 family, and the transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both.The Select (SAB, SBA) pins of the 74ABT648N determine whether data is stored or transferred through the device in real±time. The DIR determines which bus will receive data when the OE is active (Low). In the isolation mode (OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. Outputs from real-time, or stored registers will be inverted. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time. The examples on the next page demonstrate the four fundamental bus management functions that can be performed with the 74ABT648. The 74ABT648N high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The features of 74ABT648N can be summarized as (1)combines 74ABT245 and 74ABT374 type functions in one device; (2)independent registers for A and B buses; (3)multiplexed real-time and stored data; (4)output capability: +64mA/±32mA; (5)power-up 3-state; (6)power-up reset; (7)live insertion/extraction permitted; (8)latch-up protection exceeds 500mA per Jedec Std 17; (9)ESD protection exceeds 2000 V per MIL STD 883 method 3015 and 200 V per machine model.
The absolute maximum ratings of 74ABT648N are (1)VCC DC supply voltage: -0.5 to +7.0 V; (2)IIK DC input diode current(VI < 0): -18mA; (3)IOK DC output diode current:-50mA; (4)VI DC input voltage3: -1.2 to +7.0V; (5)VOUT DC output voltage3(output in Off or High state): -0.5 to +5.5V(6)Tstg storage temperature range: -65 to +150 °C; (7)IOUT DC output current(output in Low state): 128 mA.(NOTES:1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditionso is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings of the 74ABT648N may be exceeded if the input and output current ratings are observed.).