74ABT646CMSA

Number of Channels per Chip : 8
Output Type : 3-State
Packaging : Tube
Supply Voltage - Max : 5.5 V
Maximum Operating Temperature : + 85 C
Supply Voltage - Min : 4.5 V
Input Level : TTL
Output Level : TTL
High Level Output Current : - 32 mA
Low Level Output Current : 64 mA
Logic Type : BiCMOS
Package / Case : SSOP-24
Logic Family : 74ABT
Propagation Delay Time : 5.6 ns


Features:

Independent registers for A and B buses
Multiplexed real-time and stored data
A and B output sink capability of 64 mA, source capability of 32 mA
Guaranteed output skew
Guaranteed multiple output switching specifications
Output switching specified for both 50 pF and 250 pF loads
Guaranteed simultaneous switching noise level and dynamic threshold performance
Guaranteed latchup protection
High impedance glitch free bus loading during entire power up and power down cycle
Nondestructive hot insertion capability


Pinout




Specifications

Storage Temperature.......................... −65°C to +150°C
Ambient Temperature under Bias........ −55°C to +125°C
Junction Temperature under Bias ........−55°C to +150°C
V_CC Pin Potential to
    Ground Pin.......................................... −0.5V to +7.0V
Input Voltage (Note 2)............................ −0.5V to +7.0V
Input Current (Note 2)...................... −30 mA to +5.0 mA
Voltage Applied to Any Output
    in the Disabled or
    Power-Off State ....................................−0.5V to 5.5V
    in the HIGH State ...................................−0.5V to V_CC
Current Applied to Output
    in LOW State (Max)............... twice the rated I_OL (mA)
DC Latchup Source Current:
    OE Pin........................................................... −150 mA
    (Across Comm Operating Range)
    Other Pins..................................................... −500 mA
Over Voltage Latchup (I/O) .......................................10V


Description

The 74ABT646CMSA consists of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control OE and direction pins are provided to control the transceiver function. In the transceiver mode of the 74ABT646CMSA, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control determines which bus will receive data when the enable control OE is Active LOW. In the isolation mode (control OE HIGH), A data may be stored in the B register and/or B data may be stored in the A register.