74ABT646ADB

Number of Channels per Chip : 8
Output Type : 3-State
Packaging : Tube
Supply Voltage - Max : 5.5 V
Maximum Operating Temperature : + 85 C
Supply Voltage - Min : 4.5 V
Input Level : TTL
Output Level : TTL
Logic Family : ABT
High Level Output Current : - 32 mA
Low Level Output Current : 64 mA
Logic Type : BiCMOS
Propagation Delay Time : 5.2 ns
Package / Case : SSOP-24


Features:

  Combines 74ABT245 and 74ABT374 type functions in one device
  Independent registers for A and B buses
  Live insertion/extraction permitted
  Power-up 3-State
  Power-up reset
  Multiplexed real-time and stored data
  Output capability: +64mA/32mA
  Latch-up protection exceeds 500mA per Jedec Std 17
  ESD protection exceeds 2000 V per MIL STD 883 Method 3015
     and 200 V per Machine Model


Pinout




Specifications

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		0.5 to +7.0	V
IIK	DC input diode current	VI< 0	18	mA
VI	DC input voltage3		1.2 to +7.0	V
IOK	DC output diode current	VO< 0	50	mA
VOUT	DC output voltage3	output in Off or High state	0.5 to +5.5	V
IOUT	DC output current	output in Low state	128	mA
Tstg	Storage temperature range		65 to 150	°C

Description

The 74ABT646ADB high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT646ADB transceiver/register consists of bus transceiver circuits with 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output
Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both.

transferred through the device in real-time. The DIR determines which bus will receive data when the OE is active (Low). In the isolation mode (OE = High), data from Bus A may be stored in the Bregister and/or data from Bus B may be stored in the A register.When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The examples on the next page demonstrate the four fundamental bus management functions that can be performed with the 74ABT646ADB.