74ABT573A

Features: •74ABT573A is flow-through pinout version of 74ABT373•Inputs and outputs on opposite side of package allow easyinterface to microprocessors•3-State output buffers•Common output enable•Latch-up protection exceeds 500mA per JEDEC Std 17•ESD protection ex...

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74ABT573A Picture
SeekIC No. : 004248746 Detail

74ABT573A: Features: •74ABT573A is flow-through pinout version of 74ABT373•Inputs and outputs on opposite side of package allow easyinterface to microprocessors•3-State output buffers•C...

floor Price/Ceiling Price

Part Number:
74ABT573A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/21

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Product Details

Description



Features:

•74ABT573A is flow-through pinout version of 74ABT373
•Inputs and outputs on opposite side of package allow easy interface to microprocessors
•3-State output buffers
•Common output enable
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
•Power-up 3-State
•Power-up reset



Pinout

  Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS RATING UNIT
VCC DCsupplyvoltage   0.5to+7.0 V
IIK DCinputdiodecurrent VI < 0 18 mA
VI DC input voltage3   1.2to+7.0 V
IOK DCoutputdiodecurrent VO < 0 50 mA
VOUT DC output voltage3 outputinOfforHighstate 0.5to+5.5 V
IOUT DC output current output in Low state 128 mA
Tstg Storagetemperaturerange   65 to 150 °C



Description

The 74ABT573A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT573A device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The 74ABT573A is functionally identical to the 74ABT373 but has a flow-through pinout configuration to facilitate PC board layout and allow easy interface with microprocessors

The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is High. The latch remains transparent to the data inputs while OE is High, and stores the data that is present one setup time before the High-to-Low enable transition.

When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the 74ABT573A is in the High-impedance "OFF" state, which means they will neither drive nor load the bus.




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