Position: Home  > All Categories> Integrated Circuits (ICs) > 74ABT273

74ABT273

Features: · Eight edge-triggered D-type flip-flops· Buffered common clock· Buffered, asynchronous Master Reset· See ABT377 for clock enable version· See ABT373 for transparent latch version· See ABT374 for 3-STATE version· Output sink capability of 64 mA, source capability of 32 mA· Guaranteed lat...

product image

74ABT273 Picture
See larger image
SeekIC No. : 004248723 Detail

74ABT273: Features: · Eight edge-triggered D-type flip-flops· Buffered common clock· Buffered, asynchronous Master Reset· See ABT377 for clock enable version· See ABT373 for transparent latch version· See ABT...

74ABT273 Data Sheet

floor Price/Ceiling Price

Get Latest Price
Part Number:
74ABT273
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2025/2/15

add to my favourite

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

· Eight edge-triggered D-type flip-flops
· Buffered common clock
· Buffered, asynchronous Master Reset
· See ABT377 for clock enable version
· See ABT373 for transparent latch version
· See ABT374 for 3-STATE version
· Output sink capability of 64 mA, source capability of 32 mA
· Guaranteed latchup protection
· High impedance glitch free bus loading during entire power up and power down cycle
· Non-destructive hot insertion capability
· Disable time less than enable time to avoid bus contention


Pinout

Connection Diagram


Specifications

Storage Temperature  . . . .  . . . .  . . . . −65°C to +150°C
Ambient Temperature under Bias  . . . . −55°C to +125°C
Junction Temperature under Bias  . . . . −55°C to +150°C
VCC Pin Potential to Ground Pin . . . . . . .  . .−0.5V to +7.0V
Input Voltage (Note 2). . . . . . . . . . .  . . .  .  −0.5V to +7.0V
Input Current (Note 2). . . . . . . .  . . .  . −30 mA to +5.0 mA
Voltage Applied to Any Output
    in the Disabled or
    Power-Off State. . . . . . . . .. .   . . . .  . . .−0.5V to +4.75V
    in the HIGH State . . . . . . . . .. .  . . . .  . .  . −0.5V to VCC
Current Applied to Outpu
    in LOW State (Max) . . . . . .  . . . twice the rated IOL (mA)
DC Latchup Source Current. . . . .   . . . .  . . . .   .   −500 mA
    (Across Comm Operating Range)
Over Voltage Latchup . . . . . .  .  . . . .  . . . .  .   .VCC + 4.5V


Description

The 74ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered
Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

The register of the 74ABT273 is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output.

All outputs will be forced LOW independently of Clock or Data of the 74ABT273 inputs by a LOW voltage level on the MR input. The
device is useful for applications where the true output only is required and the Clock and Master Reset are common to
all storage elements.




Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
You may also be interested in :
Hardware, Fasteners, Accessories
MF-A02
LMS700KF07
Optoelectronics
SFH7770
TLP423J
Switches
US32DMRJ
HBGQ22P-11ET
Line Protection, Backups
BX0023
A20B-1008-0550
Memory Cards, Modules
WT32
VTL5C7
Isolators
HCPL062N
HCPL316J
View more