72V81L15PAG

Specifications

Package TSSOP 56 Speed 15 NS Temperature C Voltage 3.3 V Density 4 Kb Organization 512 x 9 Access Time 15 ns I/O Type 3.3 V LVTTL Family Name DualAsync Flags Half Full,Empty/Full Bus Width x9 Architecture Dual FIFO Timing Type Asynchronous No. of Inputs 1 No. of Outputs 1 Banks 11 Chipset CR


Description

3.3V 1K X 9 PARALLEL FIF
Board Space Savings (2x72V01) 72V81L15PAG.