Features: • Number of instructions: 81• Minimum instruction execution time 25 ns (@ 40-MHz operation) ····· µPD703100-40 30 ns (@ 33-MHz operation) ····· µPD703100-33, 703101-33, 703102-33• General registers 32 bits × 32• Instruction set optimized for control ap...
703102-33: Features: • Number of instructions: 81• Minimum instruction execution time 25 ns (@ 40-MHz operation) ····· µPD703100-40 30 ns (@ 33-MHz operation) ····· µPD703100-33, 703101...
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Features: • Number of instructions: 81• Minimum instruction execution time 25 ns (@ 40...
Parameter |
Symbol |
Condition
|
Rating |
Unit | |
---|---|---|---|---|---|
Power supply voltage |
VDD |
VDD pin
|
0.5 to +4.6 |
V | |
HVDD |
HVDD pin, HVDD VDD
|
0.5 to +7.0 |
V | ||
CVDD |
CVDD pin
|
?0.5 to +4.6 |
V | ||
CVSS |
CVSS pin
|
?0.5 to +0.5 |
V | ||
AVDD |
AVDD pin
|
?0.5 to HVDD + 0.5 |
V | ||
AVSS |
AVSS pin
|
?0.5 to +0.5 |
V | ||
Input voltage |
VI |
X1 pin, except MODE3 pin
|
?0.5 to HVDD + 0.5 |
V | |
MODE3 pin
|
?0.5 to VDD + 0.5 |
V | |||
Clock input voltage |
VK |
X1, V = 3.0 to 3.6 V
|
?0.5 to VDD + 1.0 |
V | |
Low-level output current |
IOL |
1 pin
|
4.0 |
mA | |
Total of all pins
|
100 |
mA | |||
High-level output current |
LOH |
1 pin
|
?4.0 |
mA | |
Total of all pins
|
?100 |
mA | |||
Output voltage |
VO |
HVDD = 5.0 V ± 10 %
|
?0.5 to HVDD + 0.5 |
V | |
Analog input voltage |
VIAN |
P70/ANI0 to P77/ANI7 pins |
AVDD > HVDD |
?0.5 to HVDD + 0.5 |
V |
HVDD AVDD |
?0.5 to AVDD + 0.5 |
V | |||
A/D converter reference input voltage |
AVREF |
AVDD > HVDD |
−0.5 to HVDD + 0.5 |
V | |
HVDD AVDD |
−0.5 to AVDD + 0.5 |
V | |||
Operating ambient temperature |
TA |
µPD703100-40 |
−40 to +70 |
°C | |
µPD703100-33, 703101-33, 703102-33 |
−40 to +85 |
°C | |||
Storage temperature |
Tstg |
−60 to +150 |
°C |