Features: • 16-bit CPU12 Upward compatible with M68HC11 instruction setInterrupt stacking and programmer's model identical to M68HC1120-bit ALUInstruction queueEnhanced indexed addressing• Multiplexed busSingle chip or expanded16 address/16 data wide or 16 address/8 data narrow mode...
68HC12DG128: Features: • 16-bit CPU12 Upward compatible with M68HC11 instruction setInterrupt stacking and programmer's model identical to M68HC1120-bit ALUInstruction queueEnhanced indexed addressingR...
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Rating | Symbol | Value | Unit |
Supply voltage | VDD,VDDA VDDX |
-0.3 to +6.5 | V |
Input voltage | VIN | -0.3 TO +6.5 | V |
Operating temperature range 68HC(9)12DG128PV8 68HC(9)12DG128CPV8 68HC(9)12DG128VPV8 68HC(9)12DG128MPV8 |
TA | TLto TH 0 to +70 −40 to +85 −40 to +105 −40 to +125 |
|
Storage temperature range | TSTG | -55 to +150 | |
Current drain perpin(2) Excluding VDD and VCC |
IIN | ±25 | mA |
VDD differential voltage | VDD-VDDX | 6.5 | V |
The 68HC12DG128 is available in a 112-pin thin quad flat pack (TQFP). Most pins perform two or more functions, as described in the Signal Descriptions shows pin assignments. In expanded narrow modes the lower byte data is multiplexed with higher byte data through pins 57-64.