6531

Voltage on VCC Supply Relative to VSS........-0.5V to +4.6V
VIN ........................................................-0.5V to VCC+0.5V
Storage Temperature (plastic) ..................-55^oC to +150^o
Junction Temperature ..............................................+150^o
Power Dissipation ......................................................1.0W
Short Circuit Output Current .....................................50mA
*Stresses greater than those listed uunder "Absolute Maximum Ratings" may cause permanent damage to the device.This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

The Galvantech Synchronous SRAM family of 6531 employs high-speed, low power CMOS designs using advanced triplelayer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high valued resistors.

The 6531 SRAM integrates 65,536 x 18 SRAM cells with advanced synchronous peripheral circuitry and a 18-bit comparator for tag compare operation. All synchronous inputs are gated by registers controlled by a positive-edgetriggered clock input (CLK). The synchronous inputs include all addresses, all data inputs, depth-expansion chip enables (CE# and CE1), write enable (WE#), and data input enable (DEN#).

Asynchronous inputs of 6531 include the output enable (OE#) and the match output enable (MOE#). The data outputs (Q) and match output (MATCH), enabled by OE# and MOE# respectively, are also asynchronous.

Data inputs of 6531 are registered with data input enable (DEN#) and chip enable pins (CE#, CE1). The outputs of the data input registers are compared with data in the memory array and a match signal is generated. The match output is gated into a pipeline register and released to the match output pin at the next rising edge of clock (CLK).

The 6531 operates from a +3.3V power supply.All inputs and outputs are LVTTL compatible. The 6531 is ideally suited for address tag RAM for up to 2 MB secondary cache.