6311

Supply Voltage
        VA+ and VD+
Voltage at Input and Output Pins
        Except IN0 - In7
Voltage at Analog Input Pins
        In0 - IN7
  |VA+ - VD+|
Input Current at Any Pin
   (Note 3)
Package Input Current
   (Note 3)
Power Dissipation (TA = 25 C)
   (Note 4)
       EL & W Package
Maximum Junction Temperature
Storage Temperature
Lead Temperature
   EL & W Package
Thermal Resistance
   ThetaJA
   Quad Ceramic "J" Bend
    (Still Air)
    (500LF/Min Air flow)
  Quad Ceramic Flat Pack
    (Stil Air)
    (500LF/Min Air flow)
ThetaJC
  Quad Ceramic "J" Bend
  Quad Ceramic Flat Pack
ESD Susceptibility
(Note 5)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test coditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.

Note 2: All voltages are measured with respect to Gnd, unless otherwise specified.

Note 3: When the input voltage (Vin) at any pin exceeds the power supply rails (Vin < Gnd or Vin > (Va+ or Vd+)), the current at that pin should be limited to 5mA. The 20mA maximum package input current rating allows the voltage at any four pins, with an input current of 5mA, to simultaneously exceed the power supply voltages.

Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), ThetaJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ThetaJA or the number given in the Avsolute Maximum Ratings, whichever is lower. For this device, Tjmax =150 C.

Note 5: Human body model, 100pF discharged through 1.5K Ohm resistor.

The LM12H458 is a highly integrated Data Acquisition System. Operating on just 5V, it combines a fully-differential self-calibrating (correcting linearity and zero errors) 13-bit (12-bit + sign) analog-to-digital converter (ADC) and sample-and-hold (S/H) with extensive analog functions and digital functionality. Up to 32 consecutive conversions, using two's complement format, can be stored in an internal 32-word (16-bit wide) FIFO data buffer. An internal 8-word RAM of LM12H458 can store the conversion sequence for up to eight acquisitions through the LM12H458's eight-input multiplexer. The LM12H458 can also operate with 8-bit + sign resolution and in a supervisory (watchdog) mode that compares an input signal against two programmable limits.

Programmable acquisition times and conversion rates are possible through the use of internal clock-driven timers. The reference voltage input of LM12H458 can be externally generated for absolute or ratiometric operation or can be derived using the internal 2.5V bandgap reference.

All registers, RAM, and FIFO are directly addressable through the high speed microprocessor interface to either an 8-bit or 16-bit databus. The LM12H458 includes a direct memory access (DMA) interface for high-speed conversion data transfer.