54FCT533

· Eight latches in a single package
· TTL input and output level compatible
· CMOS power consumption
· TRI-STATE outputs drive bus lines or buffer memory address registers
· Output sink capability of 32mA, source capability of 12 mA
· Inverted version of the FCT373
· Standard Microcircuit Drawing (SMD) 5962-8865101

Supply Voltage (V_CC)...... −0.5V to +7.0V
DC Input Diode Current (I_IK)
V_I = −0.5V ................−20 mA
V_I = V_CC + 0.5V ......... ....+20 mA
DC Input Voltage (V_I) ....−0.5V to V_CC + 0.5V
DC Output Diode Current (I_OK)
V_O = −0.5V................ −20 mA
V_O = V_CC + 0.5V.......... ... +20 mA
DC Output Voltage (V_O) . ..−0.5V to V_CC + 0.5V
DC Output Source
or Sink Current (I_O) ............±50 mA
DC V_CC or Ground Current
per Output Pin (I_CC or IGND)... .... ±50 mA
Storage Temperature (T_STG) ..−65°C to +150°C
DC Latchup Source
or Sink Current.............. ±300 mA
Junction Temperature (T_J)
CDIP .....................175°C

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT® circuits outside databook specifications.

The 54FCT533 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is low, the data satisfying the input timing requirements is latched. Data of 54FCT533 appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output of 54FCT533  is in the high impedance state.