54F373

Features:

*Eight latches in a single package
* TRI-STATE outputs for bus interfacing
* Guaranteed 4000V minimum ESD protection




Pinout






Specifications

Storage Temperature .........................................................................................-65 to +150
Ambient Temperature under Bias .......................................................................-55 to +125
Junction Temperature under Bias .......................................................................-55 to +175
Plastic ..............................................................................................................-55 to +150
V_CC Pin Potential to
Ground Pin ........................................................................................................-0.5V to +7.0V
Input Voltage (Note 2) .........................................................................................-0.5V to +7.0V
Input Current (Note 2) ...................................................................................-30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with V_CC e 0V)
Standard Output ..................................................................................................-0.5V to V_CC
TRI-STATE® Output ...........................................................................................-0.5V to +5.5V
Current Applied to Output
in LOW State (Max) ..............................................................................twice the rated I_OL (mA)
ESD Last Passing Voltage (Min) ..........................................................................................4000V

Temperature Min	-55 deg C
Temperature Max	125 deg C
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Description

The 54F373 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops 54F373 appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OEE) is LOW. When OE is HIGH the bus output is in the high impedance state.