54ACTQ543

Features:

Guaranteed simultaneous switching noise level and dynamic threshold performance
8-bit octal latched transceiver
Separate controls for data flow in each direction
Back-to-back registers for storage
Outputs source/sink 24 mA
4 kV minimum ESD immunity


Pinout




Specifications

Supply Voltage (V_CC )............................ -0.5V to 7.0V
DC Input Diode Current (I _IK)
    V_I = -0.5V.................................................... -20 mA
    V_I = V_CC + 0.5V ..........................................+20 mA
DC Input Voltage (V_I) ..................-0.5V to V_CC + 0.5V
DC Output Diode Current (I_OK )
   V _O = -0.5V.................................................... -20 mA
   V_O = V _CC+ 0.5V........................................... +20 mA
DC Output Voltage (V_O )................ -0.5V to V_CC + 0.5V
DC Output Source or Sink Current
   or Sink Current(I_O )...................................... ±50 mA
DC V_CC or Ground Current
   per Output Pin (I _CCor I _GND ) .......................±50 mA
Storage Temperature (T_STG )............... -65 to +150
DC Latch-up Source or
     Sink Current.............................................. ±300 mA
Junction Temperature (T_J)
     CDIP ...............................................................175


Description

The 54ACTQ543 is a non-inverting octal transceiver containing two sets of D-type registers for temporary storage of data
flowing in either direction. Separate Latch Enable and Output Enable inputs of 54ACTQ543 are provided for each register to permit in-dependent input and output control in either direction of data flow.
The 54ACTQ543 utilizes NSC Quiet Series technology to guaran-tee quiet output switching and improved dynamic threshold
performance. 54ACTQ543 features GTO(TM) output control and undershoot corrector in addition to a split ground bus for superior performance.