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54AC378DCQB

Features: `6-bit high-speed parallel register`Positive edge-triggered D-type inputs`Full`buffered common clock and enable inputs`Input clamp diodes limit high-speed termination effects`Standard Militar`Drawing (SMD) 'AC378: 5962-91605PinoutSpecifications Supply Voltage (VCC)DC Input Diode ...

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SeekIC No. : 004233110 Detail

54AC378DCQB: Features: `6-bit high-speed parallel register`Positive edge-triggered D-type inputs`Full`buffered common clock and enable inputs`Input clamp diodes limit high-speed termination effects`Standard Mili...

54AC378DCQB Data Sheet

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Part Number:
54AC378DCQB
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/12/25

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Product Details

Description



Features:

`6-bit high-speed parallel register
`Positive edge-triggered D-type inputs
`Full`buffered common clock and enable inputs
`Input clamp diodes limit high-speed termination effects
`Standard Militar`Drawing (SMD) 'AC378: 5962-91605


Pinout

Connection Diagram


Specifications

Supply Voltage (VCC)
DC Input Diode Current (IIK)
VIe -0.5V
VI e VCC a 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VOe -0.5V
VO e VCC a 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
per Output Pin (ICC or IGND)
Storage Temperature (TSTG)
Junction Temperature (TJ)
CDIP
PDIP
- 0.5V to a7.0V

-20 mA
a20 mA
-0.5V to VCC a 0.5V

-20 mA
a20 mA
-0.5V to VCC a 0.5V

g50 mA

g50 mA
-65 to a150

175
140

Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACTTM circuits outside databook specifications.




Description

The 54AC378DCQB is a 6-bit register with a buffered common Enable. This device is similar to the 'AC174, but with common Enable rather than common Master Reset.


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