54AC11533

Supply voltage range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . 0.5 V to 6 V
Input voltage range, V_I (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Output voltage range, V_O (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to VCC + 0.5 V
Input clamp current, I_IK (V_I < 0 or V_I > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, I_OK (V_O < 0 or V_O > V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous output current, I_O (V_O = 0 to V_CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V_CC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . 65°C to 150°C

‡ Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated  onditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

These 8-bit latches 54AC11533 feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registrs, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the 54AC11533 are transparent D-type latches. While the enable (C) is high, the Q outputs will follow the complements of the (D) inputs. When the output control OC is taken low, the Q outputs will be latched. The 4AC11533 is functionally equivalent to the 54AC11533 except for having inverted outputs.

A buffered output-control (OC) input of 54AC11533 can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a highimpedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance third state and increased drive of 54AC11533 provide the capability to drive the bus lines in a bus-organized system without need for interface or pull-up  omponents.

The output control (OC) of 54AC11533 does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off.

The 54AC11533 is characterized for operation over the full military temperature range of 55°C to 125°C. The 74AC11533 is characterized for operation from 40°C to 85°C.