54ABT16646

* Independent registers for A and B buses
* Multiplexed real-time and stored data
* A and B output sink capability of 48 mA, source
   capability of 24 mA
* Guaranteed latchup protection
* High impedance glitch free bus loading during entire
   power up and power down cycle
* Nondestructive hot insertion capability
* Standard Microcircuit Drawing (SMD) 5962-9450202

The 54ABT16646 consists of bus transceiver circuits with TRI-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to a high logic level. Control OE and direction pins of 54ABT16646 are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or the B register or in both. The select controls can multiplex stored and real-time (transparent mode) data. The direction control of 54ABT16646 determines which bus will receive data when the enable control OE is Active LOW. In the isolation mode (control OE HIGH), A data may be stored in the B register and/or B data may be stored in the A register.