54122

Pinout




Specifications

If Military/Aerospace specified devices are required,please contact the National Semiconductor SalesOffice/Distributors for availability and specifications.
Supply Voltage                                                                         7V
Input Voltage                                                                        5.5V
Operating Free Air Temperature Range                -55to +125

DM74                                                                          0to +70
Storage Temperature Range                                  -65to +150

Description

The 54122 features positive and negative DC level triggering nputs, complementary outputs, an optional 10 kX internal timing resistor and an overriding Direct Clear (CD) input.When the circuit is in the quasi-stable (delay) state, another trigger applied to the inputs (per Truth Table) will cause the delay period to start again, without disturbing the outputs.This process of 54122 can be repeated indefinitely and thus the output pulse period (Q HIGH, Q LOW) can be made as long as desired. Alternatively, a delay period can be terminated by a LOW signal applied to CD, which alsoprevents triggering. An internal connection from CD to the input gate makes it possible to trigger the circuit by apositive-going signal on CD, as shown in the Truth Table. For timing capacitor values greater than 1000 pF, the 54122 output pulse width is defined as follows:
tw e 0.32 RXCX (1.0 a 0.7/RX)
Where tw is in ns, RX is in kX and CX is in pF.