501GLF

Specifications

Input Frequency 2 MHz to 50 MHz No. of Inputs 1 Temperature C Output Frequency 4 MHz to 160 MHz Input Type Clock,Crystal No. of Outputs 1 Output Type CMOS Voltage 3.3 V Package TSSOP 8 Speed NA Core Supply Voltage (VDD) 3.3 V to 5 V Output Supply Voltage (VDDO) 3.3 V to 5 V Peak-to-Peak Period Jitter ± 70 ps Pk-to-Pk


Description

LOCO PLL CLOCK MULTI
The 501GLF is the most cost effective way to generate a high quality, high frequency clock output from a lower frequency crystal or clock input, and is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked- Loop (PLL) techniques, the 501GLF uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 160 MHz.

Stored in the chip's ROM 501GLF is the ability to generate 9 different multiplication factors, allowing one chip to output many common frequencies.

The 501GLF also has an Output Enable pin that tri-states the clock output when the OE pin is taken low.

501GLF features:

Packaged as 8 pin SOIC or die

Available in Pb (lead) free package

ICS's lowest cost PLL clock

Zero ppm multiplication error

Input crystal frequency of 5 - 27 MHz

Input clock frequency of 2 - 50 MHz

Output clock frequencies up to 160 MHz

Extremely low jitter - 25 ps one sigma

Compatible with all popular CPUs

Duty cycle of 45/55 up to 160 MHz

Nine selectable frequencies

Operating voltages of 3.3 V or 5.0 V

Tri-state output for board level testing

25mA drive capability at TTL levels

Ideal for oscillator replacement

Industrial temperature available

Advanced, low-power CMOS process

Not recommended for new designs. Use the IDT5V40501 for all new designs.