Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)• VCC = 3.3V ± 0.3V, Normal Range• VCC = 2.7V to 3.6V, Extended Range• VCC = 2.5V ± 0.2V...
40997: Features: • 0.5 MICRON CMOS Technology• Typical tSK(o) (Output Skew) < 250ps• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•...
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Symbol |
Rating |
Max
|
Unit |
VTERM (VDD) |
VDD Terminal Voltage with Respect to GND |
0.5 to +4.6 |
V |
VTERM(2) |
VDDQ Terminal Voltage with Respect to GND |
0.5 to VCC+0.5 |
V |
VTERM(2) (INPUTS and I/O's) |
Input and I/O Terminal Voltage with Respect to GND |
65 to +150
|
°C |
IOUT |
DC Output Current |
50 to +50
|
°C |
TSTG |
Continuous Clamp Current, VI < 0 or VI > VCC |
-65 to +150
|
mA |
TJN |
Junction Temperature |
+ 150
|
mA |
IOK |
Continuous Clamp Current, VO < 0 |
-50
|
mA |
ICC ISS |
Continuous Current through VCC or GND |
±100
|
mA |
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. VCC terminals.
3. All terminals except VCC.
CMOS technology. The ALVCH162374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop.
On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop ALVCH162374 take on the logic levels set up at the data (D) inputs. OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the highimpedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.
OE does not affect internal operations of the flip-flop ALVCH162374. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The ALVCH162374 has series resistors in the device output structure which will significantly reduce line noise when used with light loads. This driver has been designed to drive ±12mA at the designated threshold levels.
The ALVCH162374 has "bus-hold" which retains the inputs' last state whenever the input goes to a high impedance. This prevents floating inputs and eliminates the need for pull-up/down resistor.