Features: ` A simple interface to 8-bit microcontrollers that use either multiplexed or non-multiplexed busses. The bus interface logic uses the control signals generated by the microcontroller automatically when the address is decoded and a read or write is performed. A partial list of the MCU fa...
37948: Features: ` A simple interface to 8-bit microcontrollers that use either multiplexed or non-multiplexed busses. The bus interface logic uses the control signals generated by the microcontroller auto...
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` A simple interface to 8-bit microcontrollers that use either multiplexed or non-multiplexed busses. The bus interface logic uses the control signals generated by the microcontroller automatically when the address is decoded and a read or write is performed. A partial list of the MCU families supported include:
• Intel 8031, 80196, 80186, 80C251
• Motorola 68HC11, 68HC16, 68HC12, and 683XX
• Philips 8031 and 8051XA
• Zilog Z80, Z8, and Z180
• Infineon C500
• Dallas 80C320
` Internal 1 or 2 Mbit flash memory. This is the main Flash memory. It is divided into eight equal-sized blocks that can be accessed with user-specified addresses.
` Internal secondary 256 Kbit Flash memory. It is divided into four equal-sized blocks that can be accessed with user-specified addresses. This secondary memory brings the ability to execute code and update the main Flash concurrently.
` 16 or 64 Kbit SRAM. The SRAM's contents can be protected from a power failure by connecting an external battery.
` General Purpose PLD (GPLD) with 19 outputs. The GPLD may be used to implement external chip selects or combinatorial logic function.
` Decode PLD (DPLD) that decodes address for selection of internal memory blocks.
` 27 individually configurable I/O port pins that can be used for the following functions:
• MCU I/Os
• PLD I/Os
• Latched MCU address output
• Special function I/Os.
• 16 of the I/O ports may be configured as open-drain outputs.
` Standby current as low as 50 A for 5 V devices.
` Built-in JTAG compliant serial port allows full-chip In-System Programmability (ISP). With it, you can program a blank device or reprogram a device in the factory or the field.
` Internal page register that can be used to expand the microcontroller address space by a factor of 256.
` Internal programmable Power Management Unit (PMU). The PMU can automatically detect a lack of microcontroller activity and put the PSD9XX into Power Down Mode.
` Erase/Write cycles:
• Flash memory 100,000 minimum
• PLD 1,000 minimum
Symbol | Parameter | Condition | Min | Max | Unit |
TSTG | Storage Temperature | -65 | +125 | °C | |
Operating Temperature | Commercial | 0 | +70 | °C | |
Industrial | -40 | +85 | °C | ||
Voltage on any Pin | With Respect to GND | -0.6 | +7 | V | |
VPP | Device Programmer Supply Voltage |
With Respect to GND | -0.6 | +14 | V |
VCC | Supply Voltage | With Respect to GND | -0.6 | +7 | V |
ESD Protection | >2000 | V |
NOTE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not recommended. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability.