33999

Features: •Designed to Operate 5.0 V < VPWR < 27 V•24-Bit SPI for Control and Fault reporting, 3.3 V/5.0 V Compatible•Outputs Are Current Limited (0.9 A to 2.5 A) to Drive Incandescent Lamps•Output Voltage Clamp of +50 V During Inductive Switching•On/Off Control...

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33999 Picture
SeekIC No. : 004228623 Detail

33999: Features: •Designed to Operate 5.0 V < VPWR < 27 V•24-Bit SPI for Control and Fault reporting, 3.3 V/5.0 V Compatible•Outputs Are Current Limited (0.9 A to 2.5 A) to Drive In...

floor Price/Ceiling Price

Part Number:
33999
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/11/20

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Product Details

Description



Features:

•Designed to Operate 5.0 V < VPWR < 27 V
•24-Bit SPI for Control and Fault reporting, 3.3 V/5.0 V Compatible
•Outputs Are Current Limited (0.9 A to 2.5 A) to Drive Incandescent Lamps
•Output Voltage Clamp of +50 V During Inductive Switching
•On/Off Control of Open Load Detect Current (LED Application)
•VPWR Standby Current < 10 A
•RDS(ON) of 0.55 at 25°C Typical
•Independent Overtemperature Protection
•Output Selectable for PWM Control
•Output ON Short-to-VBAT and OFF Short-to-Ground/Open Detection
•54-Pin Exposed Pad Package for Thermal Performance
•Pb-Free Packaging Designated by Suffix Code EK



Pinout

  Connection Diagram


Specifications

Ratings Symbol Value Unit
ELECTRICAL RATINGS
VPWR Supply Voltage(1) VPWR -1.5 to 50 V
SPI Interface Logic Supply Voltage(1) SOPWR -0.3 to 7.0 V
SPI Interface Logic Input Voltage (CS,PWM,SI,SO,SCLK,RST,PWMn)(1) VIN -0.3 to 7.0 V
Output Drain Voltage VDS -0.3 to 45 V
Frequency of SPI Operation(2) fSPI 6.0 MHz
Output Clamp Energy(3) ECLAMP 50 mJ
ESD Voltage (4)
Human Body Model
Machine Model
VESD1
VESD2
±2000
±200
V
THERMAL RATINGS
Operating Temperature
Ambient
Junction
Case
TA
TJ
TC
-40 to 125
-40 to 150
-40 to 125
°C
Storage Temperature TSTG -55 to 150 °C
Power Dissipation (TA = 25°C)(5) PD 1.7 W
Peak Package Reflow Temperature During Reflow (6),(7) TPPRT Note 7 °C
Thermal Resistance
Junction-to-Ambient(8)
Junction- to-Lead(9)
Junction-to-Flag
RJA
RJL
RJC
75
8.0
1.2
°C/W

Notes
1.Exceeding these limits may cause malfunction or permanent damage to the device.
2.This parameter is guaranteed by design but not production tested.
3.Maximum output clamp energy capability at 150°C junction temperature using single non-repetitive pulse method.
4.ESD data is available upon request. ESD testing is performed in accordance with the Human Body Model (CZAP = 00 pF, RZAP = 1500 ) and the Machine Model (CZAP = 200 pF, RZAP = 0 ).
5.Maximum power dissipation with no heat sink used.
6.Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. xceeding these limits may cause malfunction or permanent damage to the device.
7.Freescale's Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak ackage Reflow Temperature and Moisture Sensitivity Levels (MSL),Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and  eview parametrics.
8.Tested per JEDEC test JESD52-2 (single-layer PWB).
9.Tested per JEDEC test JESD51-8 (two-layer PWB).




Description

The 33999 is a 16-output low-side switch with a 24-bit serial input control. It is designed for a variety of applications including inductive, incandescent, and LED loads. The Serial Peripheral Interface (SPI) provides both input control and diagnostic readout. Eight parallel inputs are also provided for direct Pulse Width Modulation (PWM) control of eight dedicated outputs. Additionally, an output-programmable PWM input provides PWM of any combination of outputs. A dedicated reset input provides the ability to clear all internal registers and turn all outputs off.
The 33999 directly interfaces with microcontrollers and is compatible with both 3.3 V and 5.0 V CMOS logic levels. The 33999, in effect, serves as a bus expander and buffer with fault management features that reduces the MCU's fault management burden.




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