Features: SpecificationsDescription The 33285 has the following features including PWM Capability;Power TMOS Number One (OUT1) Short-Circuit Detection and Short-Circuit Protection;Voltage Range 7.0 V 40 V;Extended Temperature Range from -40°C 125°C;Load Dump Protected;Overvoltage Detection and A...
33285: Features: SpecificationsDescription The 33285 has the following features including PWM Capability;Power TMOS Number One (OUT1) Short-Circuit Detection and Short-Circuit Protection;Voltage Range 7.0 ...
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The 33285 has the following features including PWM Capability;Power TMOS Number One (OUT1) Short-Circuit Detection and Short-Circuit Protection;Voltage Range 7.0 V 40 V;Extended Temperature Range from -40°C 125°C;Load Dump Protected;Overvoltage Detection and Activation of OUT2 During Overvoltage;Single Input Control for Both Output Stages;Capacitor Value of 100 nF Connected to Pin CP;Analog Input Control Measurement Detection;OUT1 LOAD Leakage Measurement Detection;Pb-Free Packaging Designated by Suffix Code EF.
A single input controls the 33285 in driving two external high-side NChannel TMOS power FETs controlling incandescent or inductive loads. Pulse Width Modulated (PWM) input control to 1.0 kHz is possible. The 33285 contains a common internal charge pump used to enhance the Gate voltage of both FETs.An external charge capacitor provides access to the charge pump output. Both external FETs are protected against inductive load transients by separate internal source-to-gate dynamic clamps. The power FETs are protected by the 33285 with short-circuit delay time of 800 s. The device is designed to withstand reverse polarity battery and load dump transients, encountered in automotive applications.
The output voltages at OUT1 and OUT2 are limited by controlling the current sources ION1, ION2 to avoid current flowing through the external or the internal zener diode. When voltage power supply plus threshold voltage (VCC + VTH) is reached, the current sources are turned OFF.Channel One protects the N-Channel power FET on OUT1 undercurrent and short-circuit conditions. The drain-source voltage of the FET on OUT1 is checked if Channel One is switched ON. The internal error voltage threshold determines the maximum drain-source voltage allowing the power FET to stay in the ON state. If the measured drain-source voltage exceeds the internal error voltage threshold, the output of the short-circuit protection comparator (SCPC) is enabled. If the output of the SCPC is active longer than tOCDET, output OUT1 is switched OFF.
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