2ZL361MS

      The 2ZL361MS is a 1Mx36 Synchronous Pipeline Burst NBL SRAM.The 2ZL361MS has features including Fast clock speed: 250, 225, 200, 166, 150,133MHz;Fast access times: 2.6, 2.8,3.0, 3.5, 3.8, 4.2ns;Fast OE# access times: 2.6, 2.8, 3.0, 3.5, 3.8, 4.2ns;Separate +2.5V ± 5% power supplies for Core, I/O (VCC, VCCQ);Snooze Mode for reduced-standby power;Individual Byte Write control;Clock-controlled and registered addresses, data I/Os and control signals;Burst control (interleaved or linear burst);Packaging:119-bump BGA package;Low capacitive bus loading.
      The WEDC SyncBurst - SRAM family employs high-speed,low-power CMOS designs that are fabricated using an advanced CMOS process. WEDC's 32Mb SyncBurst SRAMs integrate two 1M x 18 SRAMs into a single BGA package to provide 1M x 36 configuration. All synchronous inputs pass through registers controlled by a positiveedge-triggered single-clock input (CK). The NBL or No Bus Latency Memory utilizes all the bandwidth in any combination of operating cycles. Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock. Burst order control must be tied "High or Low." Asynchronous inputs include the sleep mode enable (ZZ). Output Enable controls the outputs at any given time. Write cycles are internally self-timed and initiated by the rising edge of the clock input. This feature eliminates complex off-chip write pulse generation and provides increased timing flexibility for incoming signals.
      The WED2ZL361MS is an NBL SSRAM designed to sustain 100% bus bandwidth by eliminating turnaround cycle when there is transition from Read to Write, or vice versa. All input (with the exception of OE#, LBO# and ZZ) are synchronized to rising clock edges.When ZZ becomes a logic HIGH, ISB2Z is guaranteed after the setup time tZZ is met. Any READ or WRITE operation pending when the device enters SNOOZE MODE is not guaranteed to complete successfully. Therefore, SNOOZE MODE must not be initiated until valid pending operations are completed.
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